Yes, just — 3.1 GB spare
Qwen3.6 35B-A3B at Q4_K_M fits your M2 Pro · 32 GB entirely in unified memory at 8K context, at an estimated 28 tokens per second. Past 164K the KV cache pushes it over — quantise the cache to q8_0, or step down a quantisation, to go longer.
Mixture of experts with ~3B active: the fastest serious model a 24 GB card runs, and the best MoE under 40B on agentic coding.
The VRAM budget
Quantisation ladder
| Quant | Weights | Total @ 8K | Max context | Tok/s | Quality | Fit |
|---|---|---|---|---|---|---|
| Q8_0 | 35.5 GB | 36.3 GB | — | ~16 | −0.1% ppl | 12.3 GB over |
| Q6_K | 27.4 GB | 28.2 GB | — | ~21 | −0.4% ppl | 4.2 GB over |
| Q5_K_M | 23.7 GB | 24.5 GB | — | ~24 | −0.8% ppl | 0.5 GB over |
| Q4_K_M | 20.2 GB | 20.9 GB | 164K | 28 | −1.9% ppl | Recommended |
| Q3_K_M | 16.3 GB | 17.1 GB | 256K | 35 | −5.4% ppl | Long context |
| Q2_K | 14.0 GB | 14.8 GB | 256K | 41 | −15% ppl | Long context |
Quality is the published perplexity delta against f16 weights. Max context assumes an f16 KV cache; q8_0 roughly doubles it. Only 10 of its 40 blocks keep a per-token KV cache; the rest are linear-attention, Mamba or convolution blocks with a fixed-size state.
How to run it
$ pip install mlx-lm $ mlx_lm.generate --model mlx-community/Qwen3.6-35B-A3B-4bit \ --max-tokens 512 --prompt "Hello"
Apple's own array framework. The fastest path on Apple Silicon. More on MLX.